A computer architect needs to design the pipeline of a newmicroprocessor. She has an example program with 5x10^7instructions. Each instruction takes 8ns to finish.
a. How long does it take to execute this program on a non-pipelinedprocessor?
b. The current state-of-the-art microprocessor has about 12pipeline stages. Assume it is perfectly pipelined. How much speedupwill it achieve compared to the non-pipelined processor?
c. Real pipelining isn’t perfect since implementing pipeliningintroduces some overhead per pipeline stage. Will this overheadaffect instruction latency, instruction throughput, or both?
