Design a Moore state machine that has an input w and an output zthat should output a ‘1’ when the previous 4 values of w were 1001or 1111. Overlapping patterns are allowed. Show the state diagramand state table. Use a simple binary counting order for the stateassignment. Derive all of the next-state and output equations. Youdo not need to draw the resulting circuit, instead write a Verilogmodule for it.
