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This question concerns a synchronous sequential counter, which counts an arbitrary sequence. The properties of the counter...

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Electrical Engineering

This question concerns a synchronous sequential counter, whichcounts an arbitrary
sequence. The properties of the counter include thefollowing:
1. The counter has two inputs, input X and CLK (Clock), andthree outputs, A, B and
C. A is the most significant digit in the counting value, andC is the least
significant digit.
2. The counter counts under a POSITIVE clock edge.
3. When X is 0, the counting sequence is:
1, 6, 3, 2, 5, 1, 6, 3, 2, 5, 1, …
When X is 1, the counting sequence is:
1, 5, 7, 0, 3, 1, 5, 7, 0, 3, 1, …

(a) Write down the state table of your counter. You can assumethat the states that do
not occur are don’t care conditions.
(b) Design the counter using positive-edged triggered JKflip-flops. Show your design
steps clearly in your work. As the final result, draw thelogic circuit diagram of
your counter.

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